<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE Machine [
<!ELEMENT Machine (PunctChar*, Field*, FileChannel*, Register*, RegisterArray*, ConditionBit*, RAM*, Set*, Test*, Increment*, Shift*, Logical*, Arithmetic*, Branch*, TransferRtoR*, TransferRtoA*, TransferAtoR*, Decode*, SetCondBit*, IO*, MemoryAccess*, End, Comment*, EQU*, FetchSequence, MachineInstruction*, HighlightingInfo?, LoadingInfo?, IndexingInfo?, ProgramCounterInfo?, ModuleWindowsInfo?) >
<!ATTLIST Machine name CDATA "unnamed">
<!ELEMENT PunctChar EMPTY>
<!ATTLIST PunctChar char CDATA #REQUIRED use  (symbol|token|label|comment|pseudo|illegal) #REQUIRED>
<!ELEMENT Field (FieldValue*)>
<!ATTLIST Field name CDATA #REQUIRED type  (required|optional|ignored) #REQUIRED numBits CDATA #REQUIRED relativity (absolute|pcRelativePreIncr|pcRelativePostIncr) #REQUIRED defaultValue CDATA #REQUIRED signed (true|false) #REQUIRED id ID #REQUIRED>
<!ELEMENT FieldValue EMPTY>
<!ATTLIST FieldValue name CDATA #REQUIRED value CDATA #REQUIRED>
<!ELEMENT FileChannel EMPTY>
<!ATTLIST FileChannel file CDATA #REQUIRED id CDATA #REQUIRED>
<!ELEMENT Register EMPTY>
<!ATTLIST Register name CDATA #REQUIRED width CDATA #REQUIRED initialValue CDATA #REQUIRED readOnly (true|false) "false" id ID #REQUIRED>
<!ELEMENT RegisterArray (Register+)>
<!ATTLIST RegisterArray name CDATA #REQUIRED width CDATA #REQUIRED length CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT ConditionBit EMPTY>
<!ATTLIST ConditionBit name CDATA #REQUIRED bit CDATA #REQUIRED register IDREF #REQUIRED halt (true|false) "false" id ID #REQUIRED>
<!ELEMENT RAM EMPTY>
<!ATTLIST RAM name CDATA #REQUIRED length CDATA #REQUIRED id ID #REQUIRED cellSize CDATA "8">
<!ELEMENT Increment EMPTY>
<!ATTLIST Increment name CDATA #REQUIRED register IDREF #REQUIRED overflowBit IDREF #IMPLIED delta CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Arithmetic EMPTY>
<!ATTLIST Arithmetic name CDATA #REQUIRED type (ADD|SUBTRACT|MULTIPLY|DIVIDE) #REQUIRED source1 IDREF #REQUIRED source2 IDREF #REQUIRED destination IDREF #REQUIRED overflowBit IDREF #IMPLIED  carryBit IDREF #IMPLIED  id ID #REQUIRED>
<!ELEMENT TransferRtoR EMPTY>
<!ATTLIST TransferRtoR name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT TransferRtoA EMPTY>
<!ATTLIST TransferRtoA name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED index IDREF #REQUIRED indexStart CDATA #IMPLIED indexNumBits CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT TransferAtoR EMPTY>
<!ATTLIST TransferAtoR name CDATA #REQUIRED source IDREF #REQUIRED srcStartBit CDATA #REQUIRED dest IDREF #REQUIRED destStartBit CDATA #REQUIRED numBits CDATA #REQUIRED index IDREF #REQUIRED indexStart CDATA #IMPLIED indexNumBits CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT Shift EMPTY>
<!ATTLIST Shift name CDATA #REQUIRED source IDREF #REQUIRED destination IDREF #REQUIRED type (logical | arithmetic | cyclic) #REQUIRED direction (right | left) #REQUIRED distance CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Branch EMPTY>
<!ATTLIST Branch name CDATA #REQUIRED amount CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Logical EMPTY>
<!ATTLIST Logical name CDATA #REQUIRED source1 IDREF #REQUIRED source2 IDREF #REQUIRED destination IDREF #REQUIRED type (AND | OR | NAND | NOR | XOR | NOT) #REQUIRED id ID #REQUIRED>
<!ELEMENT Set EMPTY>
<!ATTLIST Set name CDATA #REQUIRED register IDREF #REQUIRED start CDATA #REQUIRED numBits CDATA #REQUIRED value CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Test EMPTY >
<!ATTLIST Test name CDATA #REQUIRED register IDREF #REQUIRED start CDATA #REQUIRED numBits CDATA #REQUIRED comparison (EQ | NE | LT | GT | LE | GE ) #REQUIRED value CDATA #REQUIRED omission CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Decode EMPTY >
<!ATTLIST Decode name CDATA #REQUIRED ir IDREF #REQUIRED id ID #REQUIRED>
<!ELEMENT IO EMPTY >
<!ATTLIST IO name CDATA #REQUIRED direction (input | output) #REQUIRED type (integer | ascii | unicode) #REQUIRED buffer IDREF #REQUIRED connection CDATA #IMPLIED id ID #REQUIRED>
<!ELEMENT MemoryAccess EMPTY >
<!ATTLIST MemoryAccess name CDATA #REQUIRED direction (read | write ) #REQUIRED memory IDREF #REQUIRED data IDREF #REQUIRED address IDREF #REQUIRED id ID #REQUIRED>
<!ELEMENT SetCondBit EMPTY >
<!ATTLIST SetCondBit name CDATA #REQUIRED bit IDREF #REQUIRED value (0 | 1) #REQUIRED id ID #REQUIRED>
<!ELEMENT End EMPTY>
<!ATTLIST End id ID #REQUIRED>
<!ELEMENT Comment EMPTY>
<!ATTLIST Comment name CDATA #REQUIRED id ID #REQUIRED>
<!ELEMENT Microinstruction EMPTY>
<!ATTLIST Microinstruction microRef IDREF #REQUIRED>
<!ELEMENT MachineInstruction (Microinstruction*)>
<!ATTLIST MachineInstruction name CDATA #REQUIRED opcode CDATA #REQUIRED instructionFormat CDATA #REQUIRED assemblyFormat CDATA #REQUIRED instructionColors CDATA #REQUIRED assemblyColors CDATA #REQUIRED>
<!ELEMENT FetchSequence (Microinstruction*) >
<!ELEMENT EQU EMPTY>
<!ATTLIST EQU name CDATA #REQUIRED value CDATA #REQUIRED>
<!ELEMENT HighlightingInfo (RegisterRAMPair*)>
<!ELEMENT RegisterRAMPair EMPTY>
<!ATTLIST RegisterRAMPair register IDREF #REQUIRED ram IDREF #REQUIRED dynamic (true|false) #REQUIRED>
<!ELEMENT LoadingInfo EMPTY>
<!ATTLIST LoadingInfo ram IDREF #IMPLIED startingAddress CDATA "0">
<!ELEMENT IndexingInfo EMPTY>
<!ATTLIST IndexingInfo indexFromRight CDATA "false">
<!ELEMENT ProgramCounterInfo EMPTY>
<!ATTLIST ProgramCounterInfo programCounter IDREF #REQUIRED>
<!ELEMENT ModuleWindowsInfo ((RegisterWindowInfo | RegisterArrayWindowInfo | RAMWindowInfo)*) >
<!ELEMENT RegisterWindowInfo EMPTY>
<!ATTLIST RegisterWindowInfo top CDATA "50" left CDATA "50" width CDATA "300" height CDATA "150" base (Decimal|Binary|Hexadecimal|Ascii|UnsignedDec|Unicode)  "Decimal">
<!ELEMENT RegisterArrayWindowInfo EMPTY>
<!ATTLIST RegisterArrayWindowInfo array IDREF #REQUIRED top CDATA "50" left CDATA "50" width CDATA "300" height CDATA "150" base (Decimal|Binary|Hexadecimal|Ascii|UnsignedDec|Unicode) "Decimal">
<!ELEMENT RAMWindowInfo EMPTY>
<!ATTLIST RAMWindowInfo ram IDREF #REQUIRED cellSize CDATA "1" top CDATA "50" left CDATA "50" width CDATA "450" height CDATA "450" contentsbase (Decimal|Binary|Hexadecimal|Ascii|UnsignedDec|Unicode) "Decimal" addressbase (Decimal|Binary|Hexadecimal) "Decimal">
]>

<Machine name="Wombat1.cpu" >
	<!--............. Punctuation Options .............-->
	<PunctChar char="!" use="symbol" />
	<PunctChar char="#" use="symbol" />
	<PunctChar char="$" use="symbol" />
	<PunctChar char="%" use="symbol" />
	<PunctChar char="&amp;" use="symbol" />
	<PunctChar char="^" use="symbol" />
	<PunctChar char="_" use="symbol" />
	<PunctChar char="`" use="symbol" />
	<PunctChar char="*" use="symbol" />
	<PunctChar char="?" use="symbol" />
	<PunctChar char="@" use="symbol" />
	<PunctChar char="~" use="symbol" />
	<PunctChar char="+" use="symbol" />
	<PunctChar char="-" use="symbol" />
	<PunctChar char="(" use="token" />
	<PunctChar char=")" use="token" />
	<PunctChar char="," use="token" />
	<PunctChar char="/" use="token" />
	<PunctChar char="=" use="token" />
	<PunctChar char="[" use="token" />
	<PunctChar char="\" use="token" />
	<PunctChar char="]" use="token" />
	<PunctChar char="{" use="token" />
	<PunctChar char="|" use="token" />
	<PunctChar char="}" use="token" />
	<PunctChar char="." use="pseudo" />
	<PunctChar char=":" use="label" />
	<PunctChar char=";" use="comment" />

	<!--......... machine instruction fields ............-->
	<Field name="addr" type="required" numBits="12" relativity="absolute" signed="false" defaultValue="0" id="model.Field14ee11fc">
	</Field>
	<Field name="unused" type="ignored" numBits="12" relativity="absolute" signed="true" defaultValue="0" id="model.Field7e3f8810">
	</Field>
	<Field name="op" type="required" numBits="4" relativity="absolute" signed="false" defaultValue="0" id="model.Field246a65ca">
	</Field>

	<!--............. FileChannels .................-->
	<!-- none -->

	<!--............. registers .....................-->
	<Register name="pc" width="12" initialValue="0" readOnly="false" id="model.module.Register1fe71e1a" />
	<Register name="acc" width="16" initialValue="0" readOnly="false" id="model.module.Register7be28deb" />
	<Register name="ir" width="16" initialValue="0" readOnly="false" id="model.module.Register791ff58f" />
	<Register name="mar" width="12" initialValue="0" readOnly="false" id="model.module.Registere2c9b53" />
	<Register name="mdr" width="16" initialValue="0" readOnly="false" id="model.module.Register291c5342" />
	<Register name="status" width="3" initialValue="0" readOnly="false" id="model.module.Register46fe1e5f" />

	<!--............. register arrays ...............-->
	<!-- none -->

	<!--............. condition bits ................-->
	<ConditionBit name="halt-bit" bit="0" register="model.module.Register46fe1e5f" halt="true" id="model.module.ConditionBit404b3882" />

	<!--............. rams ..........................-->
	<RAM name="Main" length="128" cellSize="8" id="model.module.RAM2a57d5db" />

	<!--............. set ...........................-->
	<!-- none -->

	<!--............. test ..........................-->
	<Test name="if(acc!=0)skip-1" register="model.module.Register7be28deb" start="0" numBits="16" comparison="NE" value="0" omission="1" id="model.microinstruction.Test560736d8" />
	<Test name="if(acc&gt;=0)skip-1" register="model.module.Register7be28deb" start="0" numBits="16" comparison="GE" value="0" omission="1" id="model.microinstruction.Test7102b722" />

	<!--............. increment .....................-->
	<Increment name="Inc2-pc" register="model.module.Register1fe71e1a" overflowBit="model.module.ConditionBit404b3882" delta="2" id="model.microinstruction.Increment26035122" />

	<!--............. shift .........................-->
	<!-- none -->

	<!--............. logical .......................-->
	<!-- none -->

	<!--............. arithmetic ....................-->
	<Arithmetic name="acc+mdr-&gt;acc" type="ADD" source1="model.module.Register7be28deb" source2="model.module.Register291c5342" destination="model.module.Register7be28deb" overflowBit="model.module.ConditionBit404b3882" id="model.microinstruction.Arithmetic75137b32" />
	<Arithmetic name="acc-mdr-&gt;acc" type="SUBTRACT" source1="model.module.Register7be28deb" source2="model.module.Register291c5342" destination="model.module.Register7be28deb" overflowBit="model.module.ConditionBit404b3882" id="model.microinstruction.Arithmetic1a4d32be" />
	<Arithmetic name="acc*mdr-&gt;acc" type="MULTIPLY" source1="model.module.Register7be28deb" source2="model.module.Register291c5342" destination="model.module.Register7be28deb" overflowBit="model.module.ConditionBit404b3882" id="model.microinstruction.Arithmetic7e923d72" />
	<Arithmetic name="acc/mdr-&gt;acc" type="DIVIDE" source1="model.module.Register7be28deb" source2="model.module.Register291c5342" destination="model.module.Register7be28deb" overflowBit="model.module.ConditionBit404b3882" id="model.microinstruction.Arithmetic42a4e9c3" />

	<!--............. branch ........................-->
	<!-- none -->

	<!--............. transferRtoR ..................-->
	<TransferRtoR name="pc-&gt;mar" source="model.module.Register1fe71e1a" srcStartBit="0" dest="model.module.Registere2c9b53" destStartBit="0" numBits="12" id="model.microinstruction.TransferRtoR2c80c04e" />
	<TransferRtoR name="mar-&gt;pc" source="model.module.Registere2c9b53" srcStartBit="0" dest="model.module.Register1fe71e1a" destStartBit="0" numBits="12" id="model.microinstruction.TransferRtoR5fabcfa2" />
	<TransferRtoR name="ir(4-15)-&gt;mar" source="model.module.Register791ff58f" srcStartBit="4" dest="model.module.Registere2c9b53" destStartBit="0" numBits="12" id="model.microinstruction.TransferRtoR30bd1088" />
	<TransferRtoR name="mdr-&gt;ir" source="model.module.Register291c5342" srcStartBit="0" dest="model.module.Register791ff58f" destStartBit="0" numBits="16" id="model.microinstruction.TransferRtoR55320dad" />
	<TransferRtoR name="mdr-&gt;acc" source="model.module.Register291c5342" srcStartBit="0" dest="model.module.Register7be28deb" destStartBit="0" numBits="16" id="model.microinstruction.TransferRtoR7f1a35f5" />
	<TransferRtoR name="acc-&gt;mdr" source="model.module.Register7be28deb" srcStartBit="0" dest="model.module.Register291c5342" destStartBit="0" numBits="16" id="model.microinstruction.TransferRtoR7ecd236b" />
	<TransferRtoR name="ir(4-15)-&gt;pc" source="model.module.Register791ff58f" srcStartBit="4" dest="model.module.Register1fe71e1a" destStartBit="0" numBits="12" id="model.microinstruction.TransferRtoR262c556a" />

	<!--............. transferRtoA ..................-->
	<!-- none -->

	<!--............. transferAtoR ..................-->
	<!-- none -->

	<!--............. decode ........................-->
	<Decode name="decode-ir" ir="model.module.Register791ff58f" id="model.microinstruction.Decode63b66b67" />

	<!--............. set condition bit .............-->
	<SetCondBit name="set-halt-bit" bit="model.module.ConditionBit404b3882" value="1" id="model.microinstruction.SetCondBit4d2d5f79" />

	<!--............. io ............................-->
	<IO name="input-int-&gt;acc" direction="input" type="integer" buffer="model.module.Register7be28deb" connection="[Console]" id="model.microinstruction.IO5a6cebcc" />
	<IO name="output-acc-&gt;int" direction="output" type="integer" buffer="model.module.Register7be28deb" connection="[Console]" id="model.microinstruction.IO1eaf62ee" />

	<!--............. memory access .................-->
	<MemoryAccess name="Main[mar]-&gt;mdr" direction="read" memory="model.module.RAM2a57d5db" data="model.module.Register291c5342" address="model.module.Registere2c9b53" id="model.microinstruction.MemoryAccess4e12df0f" />
	<MemoryAccess name="mdr-&gt;Main[mar]" direction="write" memory="model.module.RAM2a57d5db" data="model.module.Register291c5342" address="model.module.Registere2c9b53" id="model.microinstruction.MemoryAccess69639723" />

	<!--............. end ...........................-->
	<End id="model.microinstruction.End546c3348" />

	<!--............. comment ...........................-->
	<!-- none -->

	<!--............. global equs ..................-->
	<!-- none -->

	<!--............. fetch sequence ................-->
	<FetchSequence>
		<Microinstruction microRef="model.microinstruction.TransferRtoR2c80c04e" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess4e12df0f" />
		<Microinstruction microRef="model.microinstruction.TransferRtoR55320dad" />
		<Microinstruction microRef="model.microinstruction.Increment26035122" />
		<Microinstruction microRef="model.microinstruction.Decode63b66b67" />
	</FetchSequence>

	<!--............. machine instructions ..........-->

	<MachineInstruction name="stop" opcode="0" instructionFormat="op unused" assemblyFormat="op" instructionColors="#9ce5f7 #83bb83" assemblyColors="#9ce5f7" >
		<Microinstruction microRef="model.microinstruction.SetCondBit4d2d5f79" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="load" opcode="1" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#acd0a5 #b68699" assemblyColors="#acd0a5 #b68699" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR30bd1088" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess4e12df0f" />
		<Microinstruction microRef="model.microinstruction.TransferRtoR7f1a35f5" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="store" opcode="2" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#e2c8c7 #d0ddda" assemblyColors="#e2c8c7 #d0ddda" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR30bd1088" />
		<Microinstruction microRef="model.microinstruction.TransferRtoR7ecd236b" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess69639723" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="read" opcode="3" instructionFormat="op unused" assemblyFormat="op" instructionColors="#ae92d7 #c2c3b1" assemblyColors="#ae92d7" >
		<Microinstruction microRef="model.microinstruction.IO5a6cebcc" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="write" opcode="4" instructionFormat="op unused" assemblyFormat="op" instructionColors="#dfcec3 #9e9aea" assemblyColors="#dfcec3" >
		<Microinstruction microRef="model.microinstruction.IO1eaf62ee" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="add" opcode="5" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#d484c0 #a394f8" assemblyColors="#d484c0 #a394f8" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR30bd1088" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess4e12df0f" />
		<Microinstruction microRef="model.microinstruction.Arithmetic75137b32" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="subtract" opcode="6" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#83b9ef #dec5cc" assemblyColors="#83b9ef #dec5cc" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR30bd1088" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess4e12df0f" />
		<Microinstruction microRef="model.microinstruction.Arithmetic1a4d32be" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="multiply" opcode="7" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#c2ca94 #daa7b9" assemblyColors="#c2ca94 #daa7b9" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR30bd1088" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess4e12df0f" />
		<Microinstruction microRef="model.microinstruction.Arithmetic7e923d72" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="divide" opcode="8" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#a8aadd #f1fda3" assemblyColors="#a8aadd #f1fda3" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR30bd1088" />
		<Microinstruction microRef="model.microinstruction.MemoryAccess4e12df0f" />
		<Microinstruction microRef="model.microinstruction.Arithmetic42a4e9c3" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="jump" opcode="9" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#e4c4b9 #f6f3c3" assemblyColors="#e4c4b9 #f6f3c3" >
		<Microinstruction microRef="model.microinstruction.TransferRtoR262c556a" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="jmpz" opcode="a" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#b8feb9 #e4acf8" assemblyColors="#b8feb9 #e4acf8" >
		<Microinstruction microRef="model.microinstruction.Test560736d8" />
		<Microinstruction microRef="model.microinstruction.TransferRtoR262c556a" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<MachineInstruction name="jmpn" opcode="b" instructionFormat="op addr" assemblyFormat="op addr" instructionColors="#f6ecd4 #cd87c3" assemblyColors="#f6ecd4 #cd87c3" >
		<Microinstruction microRef="model.microinstruction.Test7102b722" />
		<Microinstruction microRef="model.microinstruction.TransferRtoR262c556a" />
		<Microinstruction microRef="model.microinstruction.End546c3348" />
	</MachineInstruction>

	<!--............. highlighting info .............-->
	<HighlightingInfo>
		<RegisterRAMPair register="model.module.Register1fe71e1a" ram="model.module.RAM2a57d5db" dynamic="false" />
	</HighlightingInfo>

	<!--............. loading info ..................-->
	<LoadingInfo ram="model.module.RAM2a57d5db" startingAddress="0" />

	<!--............. indexing info ............-->
	<IndexingInfo indexFromRight="false" />

	<!--............. program counter info ..................-->
	<ProgramCounterInfo programCounter="model.module.Register1fe71e1a" />

</Machine>
